(Sr./Staff) System Engineer - Edge AI & Systems

Job DescriptionWe are looking for multiple seasoned Senior and Staff System Engineers to grow an Edge AI & Systems software team to the next level. This team works within the larger ASIC team to architect and enhance Neural Network solutions in the Video Processor roadmap including these current and older products:https://www.ovt.com/products/oax8000/https://www.ovt.com/products/oax4600/https://www.ovt.com/products/oa7100/Deliveries:Neural Network Processor (NPU) architecture, programming Model, simulation, verification, profiling and optimizationSpecification, review and verification of other IP blocksFPGA images and IO boards for pre-silicon verification and design explorationBoot ROM, bare metal BSPs, sample applicationsResponsibilities:Support Inference Engine, Toolchain and ASIC teams on NPUConstantly improve productivity through automation in all areasSkills:Strong ANSI C bare-metal design, implementation, optimization and debugging using GCC-like toolchainsStrong processor architecture knowledge: ARM/RISC-V ISA, symmetric multiprocessing, cache architecture, SIMD, Vector Processing, custom instructionsStrong software, hardware and FPGA debugging capabilityGood communication, collaboration, task estimation & reporting, CI/CD via tools such as Confluence, Git, JIRA etcFamiliarity withPython for prototyping, demo, verification and/or automationOS: GNU/Linux, proprietary RTOS, Bare metalThe following will be advantageous:Detailed and comprehensive understanding of TinyML (e.g. TensorFlow Lite for MCUs), from training, quantization through to operator execution, optimizing for power, performance, and size.Requirements:Ph.D/MSEE/BSEE in Electrical Engineering, Computer Science or Computer EngineeringAt least 5 years of commercial embedded system architecture and development experience.Experienced in fixed point computing implementation strategies, such as quantization, scaling, saturation and overflow handling.Design, implement, and maintain high-quality C/C++ functional & bit-Accurate Model for NPU operation simulation